There is a case in which a plurality of central processing units (CPUs) are provided in a server. FIG. 1 illustrates an example of a connection configuration of a plurality of CPUs. To each of the CPUs #0 to #3 illustrated in FIG. 1, a memory and an input/output (I/O) device are coupled. Each of the CPUs #0 to #3 includes two ports that are used to couple the CPU to other CPUs, so that each of the CPUs #0 to #3 is coupled to two CPUs from among the other CPUs directly (that is, by Point to Point). For example, the CPU #0 is coupled to the CPUs #1 and #2 directly, the CPU #1 is coupled to the CPU #0 and #3 directly, the CPU #2 is coupled to the CPUs #0 and #3 directly, and the CPU #3 is coupled to the CPUs #1 and #2 directly.
A communication between CPUs that are not coupled to each other directly is performed through other CPU. For example, in a case where the CPU #0 accesses a cache of the CPU #3 or a memory that is coupled to the CPU #3, the access is performed through the CPU #1 or #2. Therefore, each of the CPUs #0 to #3 includes a function to perform routing of a packet that has been received from the other CPU.
There is a case in which the above-described plurality of CPUs becomes targets of dynamic reconfiguration. The dynamic reconfiguration is to perform addition and removal of hardware such as a CPU without stopping the operation of a system. As the dynamic reconfiguration, there are “Hot Add” and “Hot Remove”. “Hot Add” is executed, for example, to improve the performance of the system. “Hot Remove” is executed, for example, to remove hardware in which it is probable that a failure occurs, in advance.
However, when a CPU is removed by the Hot Remove, there may be a case in which a communication between CPUs is not performed as long as a communication path is not changed. For example, in FIG. 1, it is assumed that a communication between the CPUs #0 and #3 is performed using a communication path that passes through the CPU #2. In this case, in a case where the CPU #2 is removed by the Hot Remove, a communication between the CPUs #0 and #3 is not performed unless the path is changed to a communication path that passes through the CPU #1. However, there is a CPU for which the communication path is not allowed to be changed during the operation. In a related art, such a problem is not considered.
As documents of technologies in the related art, there are Japanese Laid-open Patent Publication No. 5-204876, and Japanese National Publication of International Patent Application No. 2003-510720.